Systems and methods for a crystal-less bluetooth low energy transceiver

ABSTRACT

A transceiver includes a receive circuit configured to receive an incoming signal and recover a reference signal at a reference frequency from the incoming signal. The incoming signal is a wireless packet. A first oscillator generates a signal at a set of predetermined frequencies. A first phase lock loop (PLL) interfaced with the first oscillator. The first PLL is configured to adjust a first oscillator frequency of the first oscillator based on an incoming frequency of the incoming signal using the reference frequency. A transmit circuit includes a second oscillator configured to generate a carrier signal at a predetermined frequency and a modulator configured to modulate data over the carrier signal at the predetermined frequency. The transmit circuit includes a second PLL interfaced with the second oscillator that sets the second oscillator to generate the carrier signal at the predetermined frequency using the reference signal. The transmit circuit transmits the modulated carrier signal.

GOVERNMENT SUPPORT CLAUSE

This invention was made with government support under ECCS1507192awarded by the National Science Foundation. The government has certainrights in the invention.

FIELD

The present disclosure relates to low energy wireless transceiversexcluding crystal oscillators.

BACKGROUND

Wireless transceivers traditionally perform local oscillator calibrationusing an external crystal oscillator that adds significant size and costto a system. Most wireless transceivers or radios need a crystaloscillator to operate in order to keep track of the timing so that theradio can communicate at the exact frequency necessary. However, crystaloscillators are bulky, heavy, and expensive. Removing the crystaloscillator enables a true single-chip radio, but an alternate means forcalibrating the local oscillator is required. Integrated references likeon-chip LC or relaxation oscillators are either high power or have PVTsensitivity too high for wireless standards.

Multiple crystal-less radios attempt to address this challenge. In oneexample, the crystal oscillator is replaced with an FBAR resonator,which is still not fully-integrated. In another example, a referenceclock is recovered from a received signal but takes too long to lock andare thus highly susceptible to interference. In a further example, anopen-loop LC oscillator is used to reduce power but has insufficientfrequency accuracy for wireless standards.

This section provides background information related to the presentdisclosure which is not necessarily prior art.

SUMMARY

This section provides a general summary of the disclosure, and is not acomprehensive disclosure of its full scope or all of its features.

A transceiver includes a receive circuit configured to receive anincoming signal and, in response to detecting the wireless packet,recover a reference signal at a reference frequency from the incomingsignal. The incoming signal is a wireless packet. A first oscillatorgenerates a signal at a set of predetermined frequencies and a firstphase lock loop (PLL) is interfaced with the first oscillator. The firstPLL is configured to, in response to detecting the wireless packet,adjust a first oscillator frequency of the first oscillator based on anincoming frequency of the incoming signal using the reference frequency.

A transmit circuit includes a second oscillator configured to generate acarrier signal at a predetermined frequency and a modulator configuredto modulate data over the carrier signal at the predetermined frequency.The transmit circuit includes a second PLL interfaced with the secondoscillator. The second PLL is configured to, in response to the firstPLL setting the first oscillator, set the second oscillator to generatethe carrier signal at the predetermined frequency using the referencesignal. The predetermined frequency is a ratio of the referencefrequency of the reference signal. The transmit circuit is configured totransmit the modulated carrier signal in response to the transmitcircuit being set to a transmit mode.

In other features, the first PLL is configured to adjust the firstoscillator frequency by averaging the incoming frequency of the incomingsignal over a predetermined period, where frequency modulation of thereference frequency is removed. In other features, the second PLL isconfigured to set the second oscillator to generate the carrier signalat the predetermined frequency using the reference frequency byaveraging the predetermined frequency of the carrier signal over apredetermined period, where frequency modulation of the referencefrequency is removed.

In other features, the transceiver includes a second receiver configuredto identify the wireless packet in response to receiving an expectedsignal at an expected frequency, where the expected frequency isincluded in the set of predetermined frequencies. The second receivertransmits a first enable instruction to the first PLL indicating thewireless packet is detected and transmits a second enable instruction tothe second PLL indicating the first PLL set the first oscillator.

In other features, the wireless packet is a sequence of packets and thetransmit circuit is set to the transmit mode in response to a finalpacket of the sequence of packets elapsing when the first oscillator andthe second oscillator are locked to the incoming signal using thereference frequency.

In other features, the transceiver includes a mixer interfaced with thereceiver circuit and the first oscillator. The first PLL is configuredto average the incoming frequency of the incoming signal over apredetermined period and forward the averaged incoming frequency to thefirst oscillator for forwarding to the mixer. In other features, thefirst oscillator operates as an open loop oscillator when detecting thewireless packet. In other features, the transceiver excludes a crystaloscillator, and wherein the crystal oscillator does not provide thereference frequency. In other features, the set of predeterminedfrequencies includes a first frequency, a second frequency, and a thirdfrequency.

In other features, the first oscillator identifies the wireless packetin response to receiving, within a predetermined advertising period, afirst signal at a first frequency when the first oscillator isgenerating the first frequency, a second signal at a second frequencywhen the first oscillator is generating the second frequency, and athird signal at a third frequency when the first oscillator isgenerating the third frequency.

In other features, the wireless packet includes a sequence of packets.In other features, the transceiver includes a second receiver toidentify the sequence of packets in response to receiving, within thepredetermined advertising period, the first signal at the firstfrequency and an absence of signal at the second frequency and the thirdfrequency, the second signal at the second frequency and the absence ofsignal at the first frequency and the third frequency, and the thirdsignal at the third frequency and the absence of signal at the firstfrequency and the second frequency.

In other features, the third signal is the incoming signal and the thirdfrequency is an expected frequency. In other features, each of the firstfrequency, the second frequency, and the third frequency are within the2.4 GHz band. In other features, the predetermined frequency is not amultiple of 2.4 GHz, and wherein the ratio is a non-integer value. Inother features, the transmit circuit includes a power amplifierconfigured to amplify the carrier signal and a transmit antennaconfigured to transmit the amplified carrier signal. In other features,setting the first oscillator and the second oscillator occurs within apredetermined lock time.

A method of transmitting and receiving signals includes receiving aplurality of signals and iterating, using a first oscillator, through aset of predetermined frequencies. The method includes identifying, by asecond receiver, a sequence of frequency-hopped packets in response toreceiving an incoming signal of the plurality of signals at an expectedfrequency. The expected frequency is included in the set ofpredetermined frequencies. The method includes, in response toidentifying the sequence of frequency-hopped packets, recovering, by areceiver, a reference signal at a reference frequency from the incomingsignal and generating and transmitting an enable instruction to a firstdevice.

The method includes, in response to the first device receiving theenable instruction, transmitting the enable instruction to a seconddevice and adjusting, by the first device, a first oscillator frequencyof the first oscillator based on the expected frequency of the incomingsignal and the reference frequency by averaging the expected frequencyover a predetermined period to remove frequency modulation. The methodincludes, in response to the second device receiving the enableinstruction, setting, by the second device, a second oscillator togenerate a carrier signal at a predetermined frequency using thereference frequency by averaging the predetermined frequency over thepredetermined period to remove frequency modulation. The method includesmodulating the carrier signal at the predetermined frequency withtransmit data and, in response to the sequence of frequency-hoppedpackets elapsing, transmitting the modulated carrier signal.

In other features, the second receiver determines the sequence offrequency-hopped packets elapsed in response to an absence of theincoming signal at the expected frequency. In other features, the methodincludes identifying the sequence of frequency-hopped packets inresponse to receiving, within a predetermined advertising period, afirst signal at a first frequency when the first oscillator isgenerating the first frequency, a second signal at a second frequencywhen the first oscillator is generating the second frequency, and athird signal at a third frequency when the first oscillator isgenerating the third frequency.

A transceiver includes a second receiver configured to receive anincoming signal and detect an advertising event based on the incomingsignal and a first oscillator configured to generate a signal at a setof predetermined frequencies to detect the advertising event. The firstoscillator is configured to iterate through each predetermined frequencyof the set of predetermined frequencies. The set of predeterminedfrequencies includes a first frequency, a second frequency, and a thirdfrequency. The advertising event is detected in response to receivingthe incoming signal at the first frequency when the first oscillator isgenerating the first frequency, the incoming signal at the secondfrequency when the first oscillator is generating the second frequency,and the incoming signal at the third frequency when the first oscillatoris generating the third frequency.

The transceiver includes a receive circuit configured to receive theincoming signal during the advertising event and, in response to thesecond receiver indicating the advertising event was detected, recover areference signal at a reference frequency from the incoming signal. Thetransceiver includes a first phase lock loop (PLL) interfaced with thefirst oscillator. The first PLL is configured to lock the firstoscillator to the incoming signal using the reference frequency inresponse to receiving a first enable instruction from the secondreceiver. The second receiver transmits the first enable instruction tothe first PLL in response to detecting the advertising event.

The transceiver includes a transmit circuit including a secondoscillator configured to generate a carrier signal. The transmit circuitincludes a modulator configured to modulate data over the carrier signalat a carrier frequency and a second PLL interfaced with the secondoscillator. The second PLL is configured to lock the second oscillatorto the incoming signal using the reference frequency in response toreceiving a second enable instruction from the first PLL. The first PLLtransmits the second enable instruction to the second PLL in response tolocking the first oscillator. The transmit circuit is configured totransmit the modulated carrier signal.

Further areas of applicability will become apparent from the descriptionprovided herein. The description and specific examples in this summaryare intended for purposes of illustration only and are not intended tolimit the scope of the present disclosure.

DRAWINGS

The drawings described herein are for illustrative purposes only ofselected embodiments and not all possible implementations, and are notintended to limit the scope of the present disclosure.

FIG. 1 is a high-level diagram of a wireless transceiver system;

FIG. 2 is a block diagram of a wireless transceiver system excluding acrystal oscillator;

FIG. 3 is a diagram illustrating timing for the proposed initialcommunication of a wireless transceiver system;

FIG. 4 is a block diagram of an example embodiment of a phase-lock-loop;

FIG. 5 is a schematic diagram of an example embodiment of a localoscillator;

FIG. 6 is a schematic diagram of an example embodiment of a band passfilter;

FIG. 7A is a graphical depiction of receiver bit error rate versussignal power;

FIG. 7B is a graphical depiction of signal-to-interference ratio versusinterference offset frequency;

FIG. 7C is a graphical depiction of gain versus frequency;

FIG. 7D is a graphical depiction of reference frequency jitter;

FIG. 8A is a graphical depiction of a carrier signal output spectrum;

FIG. 8B is a graphical depiction of an eye diagram showing frequencydeviation and modulated signal error; and

FIG. 8C is a graphical depiction of phase noise.

Corresponding reference numerals indicate corresponding parts throughoutthe several views of the drawings.

DETAILED DESCRIPTION

Example embodiments will now be described more fully with reference tothe accompanying drawings.

FIG. 1 illustrates a high-level diagram of a wireless transceiver systemincluding a mobile computing device 10 advertising a Bluetooth lowenergy (BLE) signal 12 over a set of predetermined frequency channels,as shown channels 37 through 39 to a wireless transceiver 14. In otherembodiments, the advertising may be a different signal (that is, notBLE). The wireless transceiver 14 transmits a carrier signal 16 over apredetermined frequency channel that is not limited to the channels overwhich the low energy signal 12 is advertised. The wireless transceiver14 is a crystal-less transmitter with symmetric over-the-air clockrecovery compliant with the BLE standard.

FIG. 2 illustrates a block diagram of the wireless transceiver 14excluding a crystal oscillator. The wireless transceiver 14 is comprisedgenerally of a wake up receiver 18, a receive circuit 20, a firstoscillator 22, a first phase-lock loop (PLL) 24, and a transmit circuit26. The wireless transceiver 14 is a fully-integrated crystal-lesstransceiver that receives and transmits BLE compliant messages. It is tobe understood that only the relevant components of the wirelesstransceiver 14 are discussed in relation to FIG. 2, but that othercomponents may be needed to control and manage the overall operation ofthe wireless transceiver 14, such as a power source.

The wake up receiver 18 is configured to receive advertised signals viaa receive antenna 28. The wake up receiver 18 is also configured toidentify when a BLE compliant signal is being advertised. Whileadditional signals may be advertised, in the present disclosure, a BLEcompliant communication with the wireless transceiver 14 is described.The wake up receiver 18 instructs the other components of the wirelesstransceiver 14 is engage in response to identifying an advertising eventfrom the mobile computing device 10 shown in FIG. 1. As described inmore detail in FIG. 3, a signal is advertised or broadcasted by themobile computing device 10 at a set of three predetermined frequenciescorresponding to a first channel, a second channel, and a third channel.

For BLE compliant devices, the set of three predetermined frequenciesare on channel 37, channel 38, and channel 39. The advertising event isa set of three consecutive packets being broadcast by the mobilecomputing device 10, the first packet advertised at a first frequency ofthe set of three predetermined frequencies, the second packet isadvertised at a second frequency of the set of three predeterminedfrequencies, and the third packet is advertised at a third frequency ofthe set of three predetermined frequencies.

The wake up receiver 18 is able to identify when the advertising eventis being advertised because the first oscillator 22 is generating theset of three predetermined frequencies in a loop. Then, when the firstoscillator 22 is generating the first frequency, the wake up receiver 18can identify when the advertising signal is being advertised at thefirst frequency. The wake up receiver 18 operates as a frequency-hoppingback-channel receiver to detect advertising events from a broadcasterwhile rejecting interference, meaning that the advertising signal isdetected at the first frequency and no other signal (the absence ofadditional signals) is being detected at the second and thirdfrequencies.

The wake up receiver 18 identifies the advertising event after receivingthe signal at the third frequency. Once the wake up receiver 18identifies the signal at the third frequency, the wake up receiver 18instructs the enablement of a plurality of internal signals in order torecover a reference signal from the advertised signal and transmit acarrier signal to the mobile computing device or device advertising thesignal.

The receive circuit 20 receives the incoming signal (advertising signal)in response to the wake up receiver 18 identifying the advertisingevent. The receive circuit 20 recovers an 8 MHz reference clock signalfrom the incoming signal. The wireless transceiver 14 is able toimplement to recovered signal as a reference clock signal, replacing thecrystal oscillator, because the wake up receiver 18 has alreadyconfirmed that the incoming signal is compliant with a standardassociated with the wireless transceiver 14, in this case, BLEcompliant.

The wireless transceiver 14 includes two incoming or received signalpaths mixed down by the first oscillator 22: (1) a back-channel (BC)direct conversion path for detecting advertising events, and (2) a clockrecovery path, implemented by the receive circuit 20, with anintermediate frequency of 8 MHz producing the reference for the firstPLL 24 and a second PLL 30 of the transmit circuit 26.

In the second path or the clock recovery path, the incoming signal (BLEpacket) is down-converted to an intermediate frequency of 8 MHz andfiltered by a sixth order band pass filter 40 (shown in FIG. 6) with abandwidth of 2 MHz, removing interferers on adjacent channels. The bandpass filter 40 is trimmed only once for process variation. A glitchfilter 42 removes short pulses that might exist, for example, due tonoise. The recovered signal then becomes the reference for the two PLLs,only present while receiving the incoming signal (received as the thirdBLE packet).

An 8 MHz reference frequency is sufficient for a combined PLL lock timeless than one advertising packet, meaning the transmitting localoscillator (the second oscillator) is ready before the end of theadvertising event. The 8 MHz reference frequency also relaxes therequired band pass filter center frequency and quality factor. Using twolocal oscillators allows for receiving and transmitting on different BLEchannels and for optimizing each PLL controller. The receive circuit 20forwards the reference frequency to the first PLL 24 and the second PLL30 as the reference.

The wake up receiver 18 sends an enable signal to the first PLL 24,instructing the first PLL 24 to lock to the incoming signal using thereference frequency (8 MHz clock signal). In various embodiments, analternative frequency may be selected. The 8 MHz reference frequency isimplemented so that the first PLL 24 (and the second PLL 30) lockquickly at a low power. Once the first PLL 24 receives the enableinstruction, the first PLL 24 instructs the first oscillator 22 todown-convert the incoming signal frequency by the reference frequency.Therefore, upon detecting the third packet at the third frequency in theadvertising event, the first PLL 24 is enabled and locks the firstoscillator 22 within 50 μs to the 8 MHz reference recovered from the BLEpacket by using a novel averaging controller immune to Gaussianfrequency-shift keying (GFSK)-modulated signals.

In other words, the first PLL 24 instructs the first oscillator 22 togenerate the incoming signal frequency less the reference frequency andcontinue to generate the same frequency or lock to the frequency. Whenwaiting to receive the advertising event, the first oscillator 22 isoperating as an open loop oscillator and looping through the set ofthree predetermined frequencies to identify the advertising event. Then,once the wake up receiver 18 identifies the advertising event, theenable instruction results in the first PLL 24 instructing the firstoscillator 22 to no longer operate as an open loop oscillator and lockto the incoming signal frequency less the reference frequency.

As is described in more detail with respect to FIG. 4, the first PLL 24includes signal averaging functions to average the incoming signal overa predetermined period because data is modulated over the incomingsignal (the signal is data whitened) resulting in frequency modulationof the signal. To lock to a particular frequency, the average of the setfrequency is to be zero. Therefore, the incoming signal is averaged overthe predetermined period.

Once the first PLL 24 is locked, the enable instruction is transmittedto the second PLL 30 included in the transmit circuit 26. Along with thesecond PLL 30, the transmit circuit 26 also generally consists of asecond oscillator 32, a modulator 34, and a power amplifier 36. Thearchitecture of the wireless transceiver 14 is novel due to having thetwo fast-locking PLLs and a selective baseband filter of the receivecircuit 20 to recover a reference clock (reference frequency) from theincoming signal and then transmitting a modulated carrier signal (BLEcompliant packet) on any channel. The modulator 34 is a GFSK modulatorfor open-loop modulation.

Both the first oscillator 22 and the second oscillator 32 are on-chip LCoscillators, are trimmed only once for process variation, and when inback channel scanning mode, operate open-loop without any reference.This is sufficient for a divided second oscillator 32 to clock thedigital baseband and for the first oscillator 22 to frequency hopbetween the set of three predetermined frequencies or advertisingchannels in the energy-detection back channel path and detect theadvertising event.

The second PLL 30 locks the second oscillator 32 in less than 50 μs tothe 8 MHz recovered reference with the second oscillator RF centered onany of the 40 BLE channels (that is, channels 0-39). The 8 MHz referencefrequency is only present while the third packet is being received,therefore both PLLs must lock before it ends. Finally, after the thirdpacket ends, the chip switches from receive to transmit mode, and thesecond oscillator 32 is used in open-loop mode to transmit aGFSK-modulated BLE-compliant packet in the desired, predeterminedfrequency. The modulator 34 modulates transmit data over the carriersignal at the predetermined frequency that is generated by the secondoscillator 32 to create a modulated carrier signal. The modulatedcarrier signal is transmitted via a transmit antenna 38. Selecting adesired frequency is accomplished by setting a ratio of the second PLL30 to a non-integer value. While the first PLL 24 needs to be configuredto receive BLE compliant frequencies, the second PLL 30 is uncoupledfrom the first PLL 24, providing the freedom of having a non-integerratio.

FIG. 3 is a diagram illustrating timing for the proposed pairing of awireless transceiver system. The timing diagram shows a state diagramand waveforms for the transient operation of the transceiver detectingan advertising event, recovering the 8 MHz reference, and thentransmitting a packet. The process begins with the receive back-channelpath enabled, scanning the three predetermined frequencies or three BLEadvertising channels for a predefined advertising channel hoppingsequence and packet length. The advertising channels are CH37, CH38, andCH39 at 2402, 2426, and 2480 MHz, respectively.

The first oscillator hops between channels every 50 μs to oversample anddetect the energy of advertising packets. Since the back channelreceiver is only scanning for energy in the advertising channels, thefirst oscillator frequency accuracy is relaxed, and the advertisingevent can be detected with the first oscillator hopping open-loop. Inaddition, using direct-conversion simplifies the baseband filtering andgain and reduces this path's power consumption. Once the back channeldemodulator detects the intended advertising event by correlating thedigitized signal with programmable templates, the receiver switches tothe second receive path to recover a clock reference by the receivecircuit from the last incoming packet.

As is shown in FIG. 3, the first oscillator frequency (RX LOi frequency)is hopping between a first frequency corresponding to channel 37, asecond frequency corresponding to channel 38, and a third frequencycorresponding to channel 39. When a mobile computing device isbroadcasting a BLE compliant advertising event, the wireless transceiver(via the first receive path or the wake up receiver) detects a firstpacket (energy) being transmitted using an advertising signal at thefirst frequency using channel 37. A first energy detection 50 occurswhen the broadcasting device is broadcasting a first packet at the firstfrequency corresponding to channel 37 at 52 and the first oscillator isgenerating or has hopped to the first frequency at 54.

Similarly, energy is detected at the second frequency corresponding tochannel 38 at 56 as well as at the third frequency corresponding tochannel 39 at 58. Once the third packet is detected at 58, the wake upreceiver of the wireless transceiver identifies the broadcast as anadvertising event and (1) recovers the 8 MHz reference frequency (viathe receive circuit) by prompting the second receive path to recover thereference frequency and (2) transmits the first enable instruction tothe first PLL (shown as PLL₁ En), locking the first oscillator to theincoming signal (third packet of the advertising event) using thereference frequency at 60. This ensures that neither of the two PLLs areenabled until a valid advertising event is detected, eliminating falsewakeups to provide power conservation and erroneous transmissions toensure the incoming signal provided during an advertising event is BLEcompliant, resulting in the recovered signal being reliable.

Once the first PLL is locked, the second PLL receives an enableinstruction (shown as PLL₂ En) to lock the second oscillator to apredetermined, desired transmit frequency using the reference frequency.Both PLLs implement an averaging solution to average the incoming,reference frequency over a predetermined period to ensure the averagedgenerated frequency is zero. The average processing occurs because theincoming signal is data-whitened. Both PLLs are averaging the frequencyat 62. The second oscillator is set at 64 to generate the carrier signalat the predetermined, desired frequency. Then, once channel 39 is nolonger being advertised, a switch is enabled at 66 to switch thewireless transceiver from receive mode to transmit mode. The wirelesstransceiver generates modulated carrier signal by modulating transmitdata over the carrier signal at the predetermined frequency andtransmits the modulated carrier signal via the transmit antenna at 68.

FIG. 4 is a simplified block diagram of both PLLs for reference recoveryfrom the BLE packet and carrier signal transmission. The PLLs are type-Iall-digital PLL (ADPLL) with an embedded averaging processing unit (APU)to calibrate the digital control word (DCW) while the PLL is locked. TheAPU is required because the 8 MHz reference is a data-whitened,GFSK-modulated BLE packet, and the frequency modulation needs to beremoved. The frequency accuracy increases with increasing averagingtime, and with enough PLL cycles, the influence from GFSK modulation isminimized.

The PLLs in the receive and transmit paths are controlled by differentfrequency control words (FCW) and work at separate frequencies. Thisreduces mutual coupling between the two local oscillators and enablesthe transmit circuit to transmit in any channel. The local oscillatordepicted in FIG. 5 uses both NMOS and PMOS cross-coupled pairs fornegative resistance and a digitally tuned resistor tail, which helpskeep the transistors out of triode and improves phase noise.

The wireless transceiver implementing an ADPLL with averaging controllerto recover a stable reference from a GFSK-modulated data-whitened signalis a further point of novelty. The wireless transceiver with clockrecovery meets all BLE requirements for signal-to-interference ratio(SIR), making this a robust solution for removing the crystal oscillatoreven in densely populated networks.

FIG. 6 depicts a sixth order active RC BPF that is synthesized bycascading three second order biquads. Each biquad stage is fullydifferential using the Tow-Thomas topology for its lower sensitivity toparasitics. In transmit mode, a switched capacitor digital poweramplifier improves efficiency at low power levels.

The wireless transceiver can be fabricated in a 40 nm CMOS process. FIG.7A shows the measured sensitivity is −86 dBm at a bit error rate (BER)of 10⁻³. FIG. 7B depicts that the SIR when receiving back-channelmessages was measured to be −18 dB, −51 dB, and <−60 dB for the 1^(st),5^(th) and 10^(th) adjacent channels, respectively, meeting the BLEspecifications for blocker rejection. The SIR when recovering areference clock is −20 dB and <−60 dB for the 1^(st) and 2^(nd) adjacentchannels, respectively. FIG. 7C is a graphical depiction of gain versusfrequency showing the NF of the clock recovery path is less than 12 dB.FIG. 7D is a graphical depiction of reference frequency jitter. The NFof the clock recovery path is critical to minimize RMS jitter in therecovered clock, which is measured at 6.5 ps in FIG. 7D and iscomparable to crystal oscillators operating at similar frequencies.

FIG. 8A shows the carrier signal output spectrum or the GFSK TX outputspectrum along with the BLE spectral mask. The measured eye diagram ofthe carrier signal or transmitted output packet is shown in FIG. 8B,where the clock driving the GFSK modulator is divided down fromopen-loop first oscillator. The free running LC oscillator archives −117dBc/Hz phase noise at 1 MHz offset, as shown in FIG. 8C.

The wireless transceiver has the fastest reported frequency calibrationtime of all crystal-less radios, outperforming previous designs ininterference rejection through high-Q filtering and by enabling PLLsonly after detecting a valid advertising event when a BLE packet isknown to be present.

The terminology used herein is for the purpose of describing particularexample embodiments only and is not intended to be limiting. As usedherein, the singular forms “a,” “an,” and “the” may be intended toinclude the plural forms as well, unless the context clearly indicatesotherwise. The terms “comprises,” “comprising,” “including,” and“having,” are inclusive and therefore specify the presence of statedfeatures, integers, steps, operations, elements, and/or components, butdo not preclude the presence or addition of one or more other features,integers, steps, operations, elements, components, and/or groupsthereof. The method steps, processes, and operations described hereinare not to be construed as necessarily requiring their performance inthe particular order discussed or illustrated, unless specificallyidentified as an order of performance. It is also to be understood thatadditional or alternative steps may be employed.

When an element or layer is referred to as being “on,” “engaged to,”“connected to,” or “coupled to” another element or layer, it may bedirectly on, engaged, connected or coupled to the other element orlayer, or intervening elements or layers may be present. In contrast,when an element is referred to as being “directly on,” “directly engagedto,” “directly connected to,” or “directly coupled to” another elementor layer, there may be no intervening elements or layers present. Otherwords used to describe the relationship between elements should beinterpreted in a like fashion (e.g., “between” versus “directlybetween,” “adjacent” versus “directly adjacent,” etc.). As used herein,the term “and/or” includes any and all combinations of one or more ofthe associated listed items.

Although the terms first, second, third, etc. may be used herein todescribe various elements, components, regions, layers and/or sections,these elements, components, regions, layers and/or sections should notbe limited by these terms. These terms may be only used to distinguishone element, component, region, layer or section from another region,layer or section. Terms such as “first,” “second,” and other numericalterms when used herein do not imply a sequence or order unless clearlyindicated by the context. Thus, a first element, component, region,layer or section discussed below could be termed a second element,component, region, layer or section without departing from the teachingsof the example embodiments.

The foregoing description of the embodiments has been provided forpurposes of illustration and description. It is not intended to beexhaustive or to limit the disclosure. Individual elements or featuresof a particular embodiment are generally not limited to that particularembodiment, but, where applicable, are interchangeable and can be usedin a selected embodiment, even if not specifically shown or described.The same may also be varied in many ways. Such variations are not to beregarded as a departure from the disclosure, and all such modificationsare intended to be included within the scope of the disclosure.

What is claimed is:
 1. A transceiver comprising: a receive circuitconfigured to receive an incoming signal, wherein the incoming signal isa wireless packet and, in response to detecting the wireless packet,recover a reference signal at a reference frequency from the incomingsignal; a first oscillator generates a signal at a set of predeterminedfrequencies; a first phase lock loop (PLL) interfaced with the firstoscillator, the first PLL is configured to: in response to detecting thewireless packet, adjust a first oscillator frequency of the firstoscillator based on an incoming frequency of the incoming signal usingthe reference frequency; and a transmit circuit including: a secondoscillator configured to generate a carrier signal at a predeterminedfrequency; a modulator configured to modulate data over the carriersignal at the predetermined frequency; and a second PLL interfaced withthe second oscillator, the second PLL is configured to: in response tothe first PLL setting the first oscillator, set the second oscillator togenerate the carrier signal at the predetermined frequency using thereference signal, wherein the transmit circuit is configured to transmitthe modulated carrier signal in response to the transmit circuit beingset to a transmit mode.
 2. The transceiver of claim 1 wherein the firstPLL is configured to adjust the first oscillator frequency by averagingthe incoming frequency of the incoming signal over a predeterminedperiod, wherein frequency modulation of the reference frequency isremoved.
 3. The transceiver of claim 1 further comprising: a firstreceiver configured to: detect the wireless packet in response toreceiving an expected signal at an expected frequency, wherein theexpected frequency is included in the set of predetermined frequencies;transmit a first enable instruction to the first PLL indicating thewireless packet is detected; and transmit a second enable instruction tothe second PLL indicating the first PLL set the first oscillator.
 4. Thetransceiver of claim 3 wherein the wireless packet is a sequence ofpackets and the transmit circuit is set to the transmit mode in responseto a final packet of the sequence of packets elapsing when the firstoscillator and the second oscillator are locked to the incoming signalusing the reference frequency.
 5. The transceiver of claim 1 furthercomprising: a mixer interfaced with the receive circuit and the firstoscillator, wherein the first PLL is configured to: average the incomingfrequency of the incoming signal over a predetermined period; andforward the averaged incoming frequency to the first oscillator forforwarding to the mixer.
 6. The transceiver of claim 1 wherein the firstoscillator operates as an open loop oscillator when detecting thewireless packet.
 7. The transceiver of claim 1 wherein the transceiverexcludes a crystal oscillator, and wherein the crystal oscillator doesnot provide the reference frequency.
 8. The transceiver of claim 1wherein the set of predetermined frequencies includes a first frequency,a second frequency, and a third frequency.
 9. The transceiver of claim 1wherein the first oscillator identifies the wireless packet in responseto receiving, within a predetermined advertising period: a first signalat a first frequency when the first oscillator is generating the firstfrequency, a second signal at a second frequency when the firstoscillator is generating the second frequency, and a third signal at athird frequency when the first oscillator is generating the thirdfrequency.
 10. The transceiver of claim 9 wherein the wireless packetincludes a sequence of packets, and wherein a first receiver identifiesthe sequence of packets in response to receiving, within thepredetermined advertising period: the first signal at the firstfrequency and an absence of signal at the second frequency and the thirdfrequency, the second signal at the second frequency and the absence ofsignal at the first frequency and the third frequency, and the thirdsignal at the third frequency and the absence of signal at the firstfrequency and the second frequency.
 11. The transceiver of claim 10wherein the third signal is the incoming signal and the third frequencyis an expected frequency.
 12. The transceiver of claim 9 wherein each ofthe first frequency, the second frequency, and the third frequency arewithin a 2.4 GHz band.
 13. The transceiver of claim 1 wherein thepredetermined frequency is not a multiple of 2.4 GHz.
 14. Thetransceiver of claim 1 wherein the transmit circuit includes: a poweramplifier configured to amplify the modulated carrier signal, and atransmit antenna configured to transmit the amplified modulated carriersignal.
 15. The transceiver of claim 1 wherein setting the firstoscillator and the second oscillator occurs within a predetermined locktime.
 16. A method of transmitting and receiving signals comprising:receiving a plurality of signals; iterating, using a first oscillator,through a set of predetermined frequencies; identifying, by a firstreceiver, a sequence of frequency-hopped packets in response toreceiving an incoming signal of the plurality of signals at an expectedfrequency, wherein the expected frequency is included in the set ofpredetermined frequencies; in response to identifying the sequence offrequency-hopped packets: recovering, by a second receiver, a referencesignal at a reference frequency from the incoming signal; and generatingand transmitting an enable instruction to a first device; in response tothe first device receiving the enable instruction: transmitting theenable instruction to a second device; and adjusting, by the firstdevice, a first oscillator frequency of the first oscillator based onthe expected frequency of the incoming signal and the referencefrequency; and in response to the second device receiving the enableinstruction: setting, by the second device, a second oscillator togenerate a carrier signal at a predetermined frequency using thereference frequency; modulating the carrier signal at the predeterminedfrequency with transmit data; and in response to the sequence offrequency-hopped packets elapsing, transmitting the modulated carriersignal.
 17. The method of claim 16 wherein the first receiver determinesthe sequence of frequency-hopped packets elapsed in response to anabsence of the incoming signal at the expected frequency.
 18. The methodof claim 16 further comprising identifying the sequence offrequency-hopped packets in response to receiving, within apredetermined advertising period: a first signal at a first frequencywhen the first oscillator is generating the first frequency, a secondsignal at a second frequency when the first oscillator is generating thesecond frequency, and a third signal at a third frequency when the firstoscillator is generating the third frequency.
 19. The method of claim 18further comprising identifying the sequence of frequency-hopped packetsin response to receiving, within the predetermined advertising period:the first signal at the first frequency and an absence of signal at thesecond frequency and the third frequency, the second signal at thesecond frequency and the absence of signal at the first frequency andthe third frequency, and the third signal at the third frequency and theabsence of signal at the first frequency and the second frequency.
 20. Atransceiver comprising: a first end receiver configured to receive anincoming signal and detect an advertising event based on the incomingsignal; a first oscillator configured to generate a signal at a set ofpredetermined frequencies to detect the advertising event, wherein thefirst oscillator is configured to iterate through each predeterminedfrequency of the set of predetermined frequencies, and wherein the setof predetermined frequencies includes a first frequency, a secondfrequency, and a third frequency, wherein the advertising event isdetected in response to receiving: the incoming signal at the firstfrequency when the first oscillator is generating the first frequency;the incoming signal at the second frequency when the first oscillator isgenerating the second frequency; and the incoming signal at the thirdfrequency when the first oscillator is generating the third frequency; areceive circuit configured to receive the incoming signal during theadvertising event and, in response to the first receiver indicating theadvertising event was detected, recover a reference signal at areference frequency from the incoming signal; a first phase lock loop(PLL) interfaced with the first oscillator, the first PLL is configuredto: lock the first oscillator to the incoming signal using the referencefrequency in response to receiving a first enable instruction from thefirst receiver, wherein the first receiver transmits the first enableinstruction to the first PLL in response to detecting the advertisingevent; and a transmit circuit including: a second oscillator configuredto generate a carrier signal; a modulator configured to modulate dataover the carrier signal at a carrier frequency; and a second PLLinterfaced with the second oscillator, the second PLL is configured to:lock the second oscillator to the incoming signal using the referencefrequency in response to receiving a second enable instruction from thefirst PLL, wherein the first PLL transmits the second enable instructionto the second PLL in response to locking the first oscillator, whereinthe transmit circuit is configured to transmit the modulated carriersignal.